COMMITTEES

Mixed-Signal/RF Subcommittee

Deliverables

PDK Checklist
The Mixed-Signal/RF PDK Checklist describes simulation models, technology files, design rule files and parameterized cell generators used to design today's complex mixed-signal and RF ICs. Checklists have been integrated into development workflows and are being delivered with new MS/RF PDKs by member foundries and PDK development service providers.

• Mixed-Signal/RF PDK Checklist (Version 2.0) (MS Word Doc, 172KB)
• Mixed-Signal/RF PDK Checklist Users Guide (Version 2.0) (Adobe PDF File, 86KB)

SPICE Model Checklist
The Mixed-Signal/RF SPICE Model Checklist, developed by the Mixed-Signal/RF Subcommittee’s Model Working Group, provides fabless mixed-signal/RF designers using foundry SPICE models with consistent data to make foundry process and IC design decisions. The Checklist streamlines the MS/RF SPICE model extraction and distribution process throughout the semiconductor supply chain including foundry, fabless, EDA, IP and design service providers.

• Mixed-Signal/RF SPICE Model Checklist (Version 1.2) (MS Word Doc, 158KB)
• Mixed-Signal/RF SPICE Model Checklist - Users Guide (Version 1.2) (Adobe PDF File, 84KB)
• Mixed-Signal/RF SPICE Model Checklist - Taxonomy & Definitions (Adobe PDF File, 122KB)

Presentations from August 2005 Distinguished Speaker Series Technical Session
(Adobe PDF Files)

• Introduction (212KB)
• Importance & Value of Modeling (153KB)
• Model Checklist Tutorial (498KB)
• Checklist Benefits - Fabless Users (148KB)
• Checklist Benefits - Foundry Users (150KB)
• Checklist Benefits - EDA Users (150KB)